FPGA implementation and processing hardware

Noise shaping, accuracy and conversion hardware

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Everything he said on this topic (223)

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2014-04-16Watts says he consults on custom silicon and designs for Chord using his IP, and explains why FPGAs suit low-volume high-end designs like Hugo better than custom chips. Head-Fi, Apr 2014
2014-04-17Watts says FPGA progress may allow 10M taps in ten years, stresses that he has argued for tap length and timing since DAC64, against a high-end focus on pre-ringing. Head-Fi, Apr 2014
2014-04-17Watts says the tap length is set by the FPGA, reached through many iterations to fit and meet timing while leaving resources for other functions. Head-Fi, Apr 2014
2014-05-16Watts says Spartan-6 took years to become available, Artix does not compete on price, a Spartan-6 replacement is at least 3 years away, and Moore's law is slowing. Head-Fi, May 2014
2014-07-02Watts rebuts a poster: he consults for silicon companies, Hugo's 16 cores at 208 MHz dwarf ASIC DACs, and FFTs at -40 and -140 dB show no distortion or NFM. Head-Fi, Jul 2014
2014-08-03Watts says John Franks saw a market for a portable DAC amp, the project began in autumn 2012, and the Spartan-6 LX9 FPGA let Hugo take the reference DAC's code. article, Aug 2014
2014-08-03Watts answers 'knowledge': cost limits the capacity of audio chips he designs IP for, while an FPGA removes that bottleneck at higher cost but still needs expertise. article, Aug 2014
2014-08-03Watts says the replacement for the QBD DAC is well under way, with an FPGA of nearly 10 times Hugo's capacity. article, Aug 2014
2014-08-29Watts says FPGA DAC design is far harder than using chips, his Verilog RTL serves ASIC or FPGA alike, and Hugo reflects a six-year upgrade of FPGA modules. Head-Fi, Aug 2014
2015-03-02Watts says the 164,000-tap filter runs on an LX75 FPGA after four redesigns for timing closure, using 160 DSP cores at half speed for the first WTA stage. Head-Fi, Mar 2015
2015-03-02Watts defers discussing the 164,000-tap filter's sound until launch, saying its LX75 FPGA draws 5W and could only go portable with 10nm FPGAs in five or more years. Head-Fi, Mar 2015
2015-03-13Watts says Project xxxx's headphone drive has slightly more voltage and the same current as Hugo, and it cannot be battery powered since its FPGA dissipates 5W. Head-Fi, Mar 2015
2015-03-27Watts says his USB input is isochronous asynchronous: asynchronous on the USB side but synchronous inside the FPGA, whose clock sets the timing. Audiophile Style, Mar 2015
2015-04-15Watts explains FPGAs, their DSP cores used for interpolation filters, says Hugo's FPGA has 16 DSP cores, 100 times a normal DAC's logic, and an upcoming product's is 1000 times. article, Apr 2015
2015-04-20Watts says Project xxxx launches at Munich and is unlikely to become a Hugo upgrade, since its improvements need far more FPGA capacity than Hugo has. Head-Fi, Apr 2015
2015-05-16Watts says it is impossible because DAVE's large FPGA dissipates 5W against Hugo's 0.8W, needs a machined heatsink, and uses 166 DSP cores for WTA filtering. needs context Head-Fi, May 2015
2015-05-20Watts says DAVE's FPGA is 10 times more complex than Hugo's, giving 164,000 taps, an enhanced WTA algorithm, FIR filtering to 256 times, then further filtering to 2048. HIFICLUBE.NET JVH 45
2015-05-20Watts calls a 256-times FIR filter a world record, cites 166 parallel DSP cores, and says sampling theory needs an infinite-tap, infinitely oversampling filter for perfect reconstruction. HIFICLUBE.NET JVH 1:17
2015-09-14Watts says Hugo is FPGA limited, so lessons from Dave cannot be applied; Dave may be upgradable via Chord or the distributor, only for a clear subjective improvement. Head-Fi, Sep 2015
2015-10-06Watts says Dave uses one FPGA with ten times Hugo's capacity, drawing 5A, is still a work in progress, and has PCM+ and DSD+ programs, DSD+ offering lower latency. Head-Fi, Oct 2015
2015-10-06Watts says the DSD+ filter could not be routed alongside the 164,000-tap PCM+ filter despite under 70% capacity, but the 82,000-tap low-latency filter is smaller. Head-Fi, Oct 2015
2015-11-22Watts says not to upsample on a computer before his DACs; Dave's 166 DSP cores outpace a PC, and only the WTA algorithm targets transient timing errors. Head-Fi, Nov 2015
2015-11-24Watts says his new 64-core DSD filters could not be routed with the 164,000-tap WTA filter, hence two programs: PCM+ with Hugo DSD, and DSD+ with 82,000 taps. Head-Fi, Nov 2015
2016-01-09Watts says silicon chip design is budget-limited and suffers non-linear silicon and capacitors, while an FPGA plus discrete components lets him build his own chip in Mojo without those problems. What Hi-Fi? 3:29
2016-01-09Watts says sound quality depends on the interpolation filter, infinite processing would perfectly recover the analog signal, and Mojo has 500 times conventional chips' processing power and 44 DSP cores. What Hi-Fi? 4:16
2016-01-09Watts says the 400-pound Mojo has more cores than a Pentium, so it better calculates missing information between samples, reproducing timing more faithfully for better timbre, instrument location and musicality. What Hi-Fi? 4:59
2016-01-21Watts says Dave's FPGA has 132 DSP slices plus 34 fabric cores, his DACs reject source jitter equally, and source differences come from RF and correlated noise, removed by isolation. Head-Fi, Jan 2016
2016-01-29Watts says Hugo development has stopped because its FPGA is too small, and that after he improved DAVE's WTA filters it sounds faster, tighter, more dynamic, neutral and transparent. article, Jan 2016
2016-03-02Watts explains a DSP core is a dedicated FPGA multiply-accumulate module used to build WTA filters; Dave's FPGA has 132, so he built the missing 34 of 166 from fabric. Head-Fi, Mar 2016
2016-03-03Watts says his line count includes hand-copied coefficient data, verification and FPGA timing closure are the hardest parts, and Dave's roughly 100,000 lines took 9 months. Head-Fi, Mar 2016
2016-03-07Watts says ordinary DAC ICs use 100 taps at 8x or 16x; the article gives DAVE 164,000 taps at 256fs on 166 DSPs, and DAC64 1,000, QBD76 18,000, Hugo 26,000 taps. article, Mar 2016
2016-03-19Watts says Dave has no control electronics beyond the FPGA, cutting RF noise but forcing him to code everything including the display; he ran out of time for remote numbers. Head-Fi, Mar 2016
2016-04-12Watts gives DAVE's first-stage WTA response as +0.000003 dB at 23 kHz, cites 166 DSP cores at 0.1 TIPS, and calls ringing a red herring for judging timing. Head-Fi, Apr 2016
2016-05-21Watts says brain break-in matters far more than hardware break-in, DAVE's FPGA must be soldered rather than socketed, a replacement is years away, and code updates need significant gains. Head-Fi, May 2016
2016-06-04Watts says WTA1 uses 90% of DAVE's FPGA DSP, so a power amp fed 16FS data could use a bigger WTA2; the DAVE power amp will outpower the Hugo amp. Head-Fi, Jun 2016
2016-07-24Watts says Hugo's quality came from perceiving the starting and stopping of transients, not the WTA filter, since earlier 32,000-tap filters lacked it (Hugo had 26,000); DAVE gets bigger FPGAs. Hifistatement 3:31
2016-07-24Watts says Hugo is cost constrained while DAVE's FPGA is 10 times larger, allowing longer taps, bigger WTA filters, more advanced noise shapers and a better discrete pulse array DAC. Hifistatement 4:16
2016-07-24Watts says late-1980s pulse density modulation DACs drew him into digital design, and that by the late 1990s FPGAs could run long filters; DAC64 was the first WTA product. Hifistatement 45
2016-07-24Watts says Hugo has about 26,000 taps, Mojo similar, and DAVE 164,000 taps on 166 DSP cores filtering to 2048 times; the 100,000-line WTA code repeatedly failed timing closure. Hifistatement 3:15
2016-07-24Watts says Hugo cannot be improved because its FPGA is too small, its design is optimal for that device, and DAVE's 16FS and 256FS gains came from far more processing. Hifistatement 10:57
2016-07-27Watts says DAVE's first prototype PCB was designed over three years earlier, when the FPGA was chosen on price and availability, and knowledge matters more than FPGA size. Head-Fi, Jul 2016
2016-08-09Watts explains why a PC cannot replicate DAVE's processing: FPGAs run filter taps in parallel (DAVE 166 DSP cores, Mojo 44 at 0.45 W), and algorithm design also matters. Head-Fi, Aug 2016
2016-08-11Watts says he always uses direct-form FIR filters, folded when fewer multipliers are needed, that FPGAs are SRAM-limited, and that WTA group delay cannot be removed without hurting sound quality. Head-Fi, Aug 2016
2017-01-08Watts says the taps are used only when upscaling, so a 768 kHz signal would pass through another M scaler unchanged, and that Moore's law is running out of steam. Head-Fi, Jan 2017
2017-01-09Watts says WTA processing is identical from 44.1 to 384 kHz, explains mounting the FPGA core switching regulator underneath to limit ground-plane noise, and Blu Mk2 needing 12A. Head-Fi, Jan 2017
2017-01-29Watts says HD recordings benefit too but recording quality matters more than format, and a 16M-tap scaler would need cascaded FPGAs drawing 32A at 5V. Head-Fi, Jan 2017
2017-02-21Watts says eight weeks of listening-led tuning now use 100% of the FPGA's memory and DSP cores and 98% of logic; production code will be final, and three months of testing found no bugs. Head-Fi, Feb 2017
2017-03-19Watts says the limit is timing closure between discrete flip-flops and FPGA output delay, unchanged in 15 years; FPGA clocks run near 800 MHz, WTA modules at 208 MHz. needs context Head-Fi, Mar 2017
2017-05-06Watts says the cited figure is FPGA leakage current, 0.4 A; Blu Mk2's low power mode switches off DSP cores at digital silence, drawing 2A against 10A normally. Head-Fi, May 2017
2017-06-12Watts points to the million-tap WTA M scaler, which uses 528 DSP cores in parallel on a 7A200T FPGA about 20 times more powerful. Head-Fi, Jun 2017
2017-09-03Watts says power is the limit: the larger battery lets him use 100% of the FPGA (45 DSP cores at 208 MHz), more pulse array elements and a boost PSU. Head-Fi, Sep 2017
2017-10-13Watts says the filter algorithm hugely influences performance, and that around 1998 FPGAs could barely run an FIR filter; he needed three of them. miceblue425 20:34
2017-10-13Watts says a Xilinx FPGA family launched about 3 years ago went into Mojo and Hugo 2; he used it for Davina, then ported that work into Blu 2. miceblue425 23:55
2017-10-13Watts says Blu 2's FPGA has 740 DSP cores and about 200,000 logic cells, enough for just over a million taps; he calls this first million-tap filter the M Scaler. miceblue425 24:38
2017-10-13Watts says in DAVE's development he started from Hugo's 26,000-tap filter and designed a 164,000-tap one; two designs failed timing closure, which he explains. miceblue425 28:44
2017-10-13Watts says the DAVE filter took nine months and sounded only a bit better, so he expected little from the M Scaler and first built an easy half-million-tap version. miceblue425 29:37
2017-10-13Watts says the FPGA could just fit a million taps; timing closure tested fine at double rate, but packing memory efficiently required a completely new filter architecture. miceblue425 31:06
2017-10-13Watts describes the million-tap architecture: about 132 modules, each with eight DSP cores, one data SRAM and one coefficient memory, since large memory blocks pack more efficiently. miceblue425 31:49
2017-10-13Watts says the modular design cut coding eightfold, and going from half a million to a million taps massively changed sound quality, in a way every M Scaler listener notices. miceblue425 32:31
2017-10-13Watts says he is an FPGA designer, wants portable products, and aims within 10 years for a pocket M scaler, possible only with an FPGA; GPUs would need dedicated users. miceblue425 43:39
2017-10-13Watts says the chip draws 12 W at a 1 V core, too much for a pocket; its 740 DSP cores each do one tap per clock, unlike a microprocessor. miceblue425 45:09
2017-10-13Watts says an FPGA does everything in parallel with pipelined DSP cores, one tap per clock cycle, making it very efficient for this processing. miceblue425 46:01
2017-10-20Watts says the Xilinx XC7A200T, launched about three or 4 years ago, became buyable only about 18 months ago; he used it for the Davina project, and it allows a million taps for Blu 2. Hifistatement 0
2017-10-20Watts says he expected only incremental gains, so designed a half-million-tap filter on the new FPGA in a couple of months, heard a huge change, and decided to use more taps. Hifistatement 3:36
2017-10-20Watts says the FPGA has only just enough processors and memory for a full million-tap filter, but he delayed the project to push on with a full million taps. Hifistatement 4:24
2017-10-20Watts says the filter needed a new architecture; 528 processors at 208 MHz met timing closure with 740 DSP cores available, but memory efficiency was the problem. Hifistatement 0
2017-10-20Watts describes one coefficient ROM and one data memory feeding eight DSP cores, giving about 97 percent memory efficiency and easier coding of half a million lines. Hifistatement 45
2017-10-20Watts says, coding alone, he designed blocks of 8 cores running as separate threads, and that going from half a million to a million taps made an enormous change. Hifistatement 1:22
2017-10-21Watts says Moore's law is slowing, mask sets cost $150M, 28 nm is the economic node, and a portable M scaler needs economic 7 nm FPGAs and tenfold lower power. Head-Fi, Oct 2017
2017-10-22Watts says 16 nm Xilinx FPGAs cost thousands of dollars and are scarce, and 7 nm parts are about three years off; the 7 series launched 2012 but shipped 2015. Head-Fi, Oct 2017
2017-12-09Watts says the best sound is only achievable with FPGAs and discrete DACs; after 14 years trying with silicon, he says superior performance is not possible from chips. article, Dec 2017
2017-12-09Watts answers 'Better FPGAs', adding that the next Xilinx generation is probably several years away. needs context article, Dec 2017
2017-12-11Watts says hi-res files need the same tap length, since doubling the sample rate cuts timing error area fourfold (2 bits) while the M scaler gives about a 16-bit improvement. Head-Fi, Dec 2017
2018-01-04Watts says gate count is the reason: crossfeed runs serially at 16FS, but DSD512 would need costly parallel DSP, and the new filter removes the need for DSD plus mode. Head-Fi, Jan 2018
2018-01-11Watts says Mojo runs its DSP cores at 104 MHz rather than 208 MHz to save power; the same WTA filter then needs twice the cores but performs identically. Head-Fi, Jan 2018
2018-01-14Watts says coefficient memory is the limit, so a mono mode would not double the taps, and Davina will establish how close the M scaler is to perfection subjectively. Head-Fi, Jan 2018
2018-02-17Watts calculates that, at 10 seconds per entry on a Casio, a human would take 33,769 years to compute one second of music for the M scaler. Head-Fi, Feb 2018
2018-02-23Watts recounts DAC64 using four FPGAs and about 15 watts for a thousand taps, then Hugo reaching 26,000 taps with a huge gain; both were 8FS filters. MajorHiFi 10:27
2018-02-23Watts says a 10 times better FPGA let Dave reach 164,000 taps, and every tap-length increase improved sound quality. MajorHiFi 11:13
2018-02-23Watts describes a Xilinx FPGA announced in 2012 but available about 18 months ago, with 740 DSP cores, 16 megabits of memory and 215,000 logic cells, enabling a million taps. MajorHiFi 12:02
2018-02-23Watts recounts deciding to push the FPGA to a million taps despite expected memory and timing closure problems and having to tell John Franks the projects would be delayed. MajorHiFi 16:16
2018-02-23Watts says he alone wrote code equal to 5 percent of Windows, and explains that FPGA designs may fail to place and route or reach timing closure. MajorHiFi 17:38
2018-02-23Watts says two-thirds of FPGA effort is testing and simulation, and that his biggest problem was inefficient use of memory blocks, not timing closure. MajorHiFi 18:23
2018-02-23Watts describes making memory more efficient by feeding eight DSP cores from one memory block and one coefficient block, cutting his coding and data-transfer work by a factor of eight. MajorHiFi 19:06
2018-02-27Watts says the FPGA draws 10 or 12A at 1V, a 12W peak; the M scaler draws about 15W from mains, well isolated and RF filtered, as on Blu 2 and Dave. Head-Fi, Feb 2018
2018-04-04Watts says an FPGA lets a designer build his own digital circuits, so FPGA plus discrete analog parts escapes the subjective and technical limits of DAC chips. article, Apr 2018
2018-04-04Watts says that because the FPGA is entirely digital and cannot have analog outputs, the analog components are implemented discretely. article, Apr 2018
2018-06-30Watts explains decimation needs low-pass filtering to avoid aliasing; decimating DSD to 705/768 kHz saves FPGA space, and Hugo 2's filter beats non-decimating DSD+ through better RF removal. Head-Fi, Jun 2018
2018-07-04Watts says 15M taps is impossible for lack of memory, 4M would be doable but costs thousands of USD, so a cost-efficient Artix successor is needed. Head-Fi, Jul 2018
2018-07-04Watts says a state-of-the-art 7nm mask set costs $150 million against Xilinx revenue of $2,540 million, so cheap silicon at lower process nodes will be a long wait. Head-Fi, Jul 2018
2018-07-21Watts says a million taps was impossible in 1981, so he favored vinyl then; WTA listening tests followed, and the Xilinx A200T now gives 740 DSP cores at 12 watts. c w 17:48
2018-07-21Watts says a million taps now run at the same power as DAC64's thousand in 1999, and at a million taps the WTA coefficients become identical to a sinc function. c w 18:36
2018-07-21Watts explains FPGA timing closure and placement, saying Dave began at 200,000 taps, failed to place and route, and finally worked at 164,000 (spoken as 'pounds'). c w 20:10
2018-07-21Watts says the transformational change and good timing closure led him to the full million taps, a goal dating 'back in 1991' (as spoken), requiring a new memory-efficient filter architecture. c w 21:47
2018-07-21Watts says the M Scaler filter is half a million lines of hand-written code, using a new architecture where one memory block feeds eight DSPs running as individual threads. c w 22:34
2018-09-01Watts recommends neutral single-blind AB tests against placebo, says low-cost FPGAs have stalled since Xilinx 7 series, and nitrogen reflow soldering improves reliability and sound. Head-Fi, Sep 2018
2018-12-12Watts says he invented the pulse array in 1995, using an FPGA plus discrete components for conversion, and that silicon DAC chips struggle to reach good measured performance. Pursuit Perfect System 14:00
2018-12-12Watts says six years of code from a scrapped reference DAC went into Hugo One, but adding crossfeed at 98% FPGA capacity forced gate-count cuts without losing performance. Pursuit Perfect System 20:32
2018-12-12Watts says both noise shapers were 200 dB yet differed; he finished Hugo with crossfeed at 98% capacity, then on DAVE's ten times larger FPGA investigated why depth differed. Pursuit Perfect System 22:58
2019-01-08Watts says bringing M scaling to lower prices needs cheaper, more capable FPGAs, but cost per gate is rising, Artix 7 has no successor, and Moore's law has broken. Head-Fi, Jan 2019
2019-02-06Watts says QBD76 used 112.896 MHz, but Davina's M scaler mode could not meet timing closure at that rate, and a future pro design needs word clock and asynchronous operation. Head-Fi, Feb 2019
2019-02-06Watts says a PLL would add low-frequency jitter seen as skirts around fundamentals, explains timing closure, and says the M scaler mode processes already-recorded files. needs context Head-Fi, Feb 2019
2019-03-26Watts says that will have to wait for M scaler capable FPGAs to come down in price, with no sign of that yet. needs context Head-Fi, Mar 2019
2019-08-23Watts says a large prototyping chip offers only 15,728,640 (units unstated), probably costs tens of thousands of USD, and is meant for ASIC prototyping rather than DSP. needs context Head-Fi, Aug 2019
2019-09-19Watts says Stratix price/performance is similar to Xilinx, FPGA makers chase data-center performance, and with Moore's law dead the low-cost sector has stagnated since Xilinx's 7 series. Head-Fi, Sep 2019
2019-11-06Watts says the M scaler outputs 2.5v pp terminated, and that a Hugo 2 with integrated M scaler on one FPGA is many years, possibly decades, away. Head-Fi, Nov 2019
2019-11-28Watts says a longer-tap scaler will not replace the Hugo M Scaler until much better FPGAs exist, with no sign from Xilinx, and expects pulse array ADC progress next year. Head-Fi, Nov 2019
2019-12-10Watts says delta sigma is harder because you must design noise shapers, for example with MATLAB generating coefficients, then implement them in code on an FPGA or DSP. Passion for Sound 9:43
2019-12-10Watts says DSP cores are less flexible than FPGAs: an FPGA's hundreds of thousands of gates can do tens of thousands of things in parallel, while DSP works sequentially. Passion for Sound 10:27
2019-12-10Watts says a delta-sigma designer needs DSP or FPGA skills and MATLAB skills, plus an understanding of how to create a noise shaper. Passion for Sound 12:04
2019-12-10Watts says signal-correlated substrate noise leaches into chip DACs' analog sections, whereas his FPGA does the digital processing and discrete components do conversion, isolating the two domains. Passion for Sound 17:00
2020-06-25Watts says semiconductor work aims at good enough rather than best performance, and silicon brings substrate noise and nonlinear resistors and capacitors that FPGA discrete DACs avoid. Part-Time Audiophile 4:58
2020-06-25Watts says he uses his M Scaler on planes powered by a battery backup, but portability is limited by 12 watts of FPGA power dissipation. Part-Time Audiophile 28:08
2020-06-25Watts says the M Scaler runs about 525 DSP cores; a Hugo-sized M Scaler needs much better FPGAs, perhaps 10 years away; portable power efficiency is a major issue. Part-Time Audiophile 28:53
2020-06-25Watts says portable designs have a power budget, 2.5 watts for Hugo and 1.7 watts for Mojo, and he shaved milliwatts on Hugo 2 to spend on performance. Part-Time Audiophile 29:37
2020-06-25Watts names 1 million taps and the M Scaler, though a thumb-sized battery running 12 watts for eight hours would make a tiny device very hot. Part-Time Audiophile 30:56
2020-11-12Watts says no cheaper, better FPGAs exist to replace Hugo 2's 7 series part, and desktop mode charges the battery to only 80%. Head-Fi, Nov 2020
2020-11-12Watts, now 60, says WTA on a PC would degrade sound, a custom chip lacks a business case, and FPGAs are far short of a Hugo with built-in M scaler. Head-Fi, Nov 2020
2021-02-22Watts says a custom chip would cost about 1M USD at 130 nm with higher power, or 100M USD at 13 nm, and discrete flip-flop conversion would still be needed. Head-Fi, Feb 2021
2021-03-29Watts says Linn products are well engineered, but a PWM FPGA DAC is easy to cobble together, and state-of-the-art discrete DAC performance takes decades of work. Head-Fi, Mar 2021
2021-04-24Watts says a new Xilinx FPGA has 1200 DSP cores but slightly less memory than the 200T, will be scarce and costly; he needs more memory, cores and lower power. Head-Fi, Apr 2021
2021-04-30Watts says 1 ohm below 3kHz trips thermals, the Aeon 2 closed gives the best depth, MQA's -40dB aliasing is unacceptable, and FPGA timing closure rules out 112.896 MHz clocks. Head-Fi, Apr 2021
2021-08-30Watts says PSU leakage current is mostly 100Hz and inaudible, Xilinx lead times are 55 weeks, and more FPGA space would mainly benefit WTA2 and filters up to 104MHz. Head-Fi, Aug 2021
2021-10-18Watts says idle Qutest draws 2 W and was meant to stay on, as cool electronics are more reliable; no affordable FPGA for 0.5M taps exists or is coming. Head-Fi, Oct 2021
2021-10-25Watts says the gap to live sound remains large, his current path began with Hugo 1, which revealed ear/brain sensitivity, and progress depends on large FPGAs. Head-Fi, Oct 2021
2021-12-07Watts lists advantages of an FPGA up-sampler over a PC (lower RF noise, clock control, own DSP design) and says 64 bit floating point creates noise floor modulation. Head-Fi, Dec 2021
2022-01-31Watts says some users pair it with an M Scaler, he flies with Hugo 2, an M Scaler and a power bank, and better FPGAs might enable a Mojo-type scaler. Darko.Audio 4:29
2022-01-31Watts says a scaler that small is more like 10 years away, so 768 kHz support is sensible; he did his listening tests with the M Scaler as source. Darko.Audio 5:16
2022-01-31Watts agrees and adds that the FPGA is a digital chip, not an analog one. Darko.Audio 12:01
2022-01-31Watts says FPGAs let him build a custom 104-bit core, and an undisclosed current project runs at 140 bits with coefficients at forty decimal places of accuracy. Darko.Audio 28:41
2022-01-31Watts says the improved noise shaper gave better soundstage and detail, and bass is tighter; Mojo's power limit forced him to throttle the FPGA. Darko.Audio 37:17
2022-01-31Watts says Mojo 2 runs the FPGA at full capacity, needing 200 milliwatts more, which he saved elsewhere, for example in the relay and circuit efficiency, without losing performance. Darko.Audio 38:02
2022-01-31Watts says the extra 200 milliwatts funded the digital DC servo, a better WTA filter and noise shaper, and the EQ DSP core; the noise shaper improves depth and detail. Darko.Audio 38:46
2022-01-31Watts says with the DSP core in place crossfeed cost no gates, which matter for Mojo's power dissipation; he cannot use headphones without it, though some hear little difference. Darko.Audio 47:26
2022-01-31Watts says DSP core speed is irrelevant and taps count; Mojo 2 has four fifths of Hugo 2's tap length, no WTA2, and taps are only part of sound quality. Head-Fi, Jan 2022
2022-02-01Watts says Mojo 2's DSP core passes bit-perfect data when EQ and crossfeed are off, it still uses the 15T FPGA, and lists Hugo 2's advantages over it. Head-Fi, Feb 2022
2022-02-07Watts says he mainly uses DCA Aeon 2 Closed, and Mojo 2 uses the original Mojo DSD filter because 98% of FPGA resources were used, though its HF filter helps. Head-Fi, Feb 2022
2022-03-19Watts says the theory applies from Mojo 2 to DAVE, and Mojo 2 needed more FPGA power since the original Mojo used a third of its FPGA, being power limited. MFG Audio Reviews 24:26
2022-03-19Watts says Mojo's case can dissipate about 1.8 watts; he saved about 300 milliwatts in the analog section, spent 250 more on the FPGA, and battery capacity rose 9%. MFG Audio Reviews 25:11
2022-03-19Watts says the result is lower temperature, more processing and longer battery life, and he now uses 98% of the FPGA's capacity. needs context MFG Audio Reviews 25:54
2022-03-22Watts says the move was about ultimate performance: work on the Deltec PDM1024 showed serious problems in existing DACs, addressable only by his own FPGA design. article, Mar 2022
2022-03-22Watts says the relationship is neither proportional nor logarithmic: a further tenfold error reduction still matters, tiny things need careful listening tests, and he wants bigger FPGAs. article, Mar 2022
2022-04-04Watts says high current and low output impedance let two headphones share the output, Mojo 2 uses 98% of the FPGA versus 33%, and he avoids trivial updates. Head-Fi, Apr 2022
2022-04-26Watts says the original Mojo was limited to about 1.8 watts, so he used only a third of its FPGA; for Mojo 2 he reworked the analog section's efficiency. Audio Force 3:29
2022-04-26Watts says he saved 300 or 400 milliwatts and batteries improved about 9 percent, so Mojo 2 uses 98% of the FPGA instead of 33% at lower total power. Audio Force 4:16
2022-04-26Watts says custom coding gives him complete control and flexibility over the whole path from input to output. Audio Force 12:20
2022-04-26Watts says Mojo 2's dual port is only for use with an M Scaler, that a portable M Scaler needs 3 nm FPGAs probably 10 years away, and that he tested Mojo with one. Audio Force 16:02
2022-08-19Watts recalls the first PC around 1983 with 20 MHz processors and 64K of RAM, his own DACs from 1989 using others' chips, and moving to FPGAs around 1995. AVstore 4:46
2022-08-19Watts says he used FPGAs with off-board filters until 1999, when a Xilinx FPGA allowed 1,000 taps versus about 128 commercially, and he began developing the WTA filter. AVstore 5:30
2022-08-19Watts says as FPGAs grew he increased tap length and improved the WTA algorithm, each doubling of tap length improved the sound, and the 200T device arrived around 2015. AVstore 6:11
2022-08-23Watts recalls designing around 1994 or 1995 at dpa digital with gate-level schematics on one-time-programmable Actel antifuse FPGAs, simulating on a 66MHz 486. Head-Fi, Aug 2022
2022-10-12Watts says DAVE is FPGA-based, that an FPGA lets him design his own digital hardware, and that the design process is much the same as for a silicon chip. Upscale Audio 1:13
2022-10-12Watts confirms and says you code up your hardware design, giving complete flexibility. Upscale Audio 1:32
2022-10-12Watts contrasts chip design, citing a ten million US dollar project to be canceled unless five cents were saved, with FPGAs' far greater computational resources. Upscale Audio 1:39
2023-01-16Watts turns DAVE's HF filter off with the M scaler, doubts a Hugo 2-priced portable scaler-DAC by 2032, sets crossfeed to max, and says more taps add depth. Head-Fi, Jan 2023
2023-02-04Watts says until 2015 his improvements made the best recordings better and the worst worse, then Hugo brought a dramatic change because FPGAs let him create his own digital circuit. Dusty Audio 15:25
2023-02-04Watts says older FPGAs limited his filters and noise shapers; 2015 FPGAs had three or four times the capacity, and in Hugo poor recordings improved more than good ones. Dusty Audio 16:13
2023-02-04Watts says updates were impossible in 2015, now technically possible; FPGA code is optimized to the hardware, and Dave took two and a half to 3 years before he moved on. Dusty Audio 1:03:33
2023-02-04Watts says he verifies bit perfection by measurement: after each FPGA place and route he ran optical into an Audio Precision for hours of averaged FFTs. Dusty Audio 1:09:04
2023-02-04Watts says Xilinx tools six or seven years ago were poor and each place and route sounded different; today's tools are good, but he still runs the test. Dusty Audio 1:09:54
2023-02-05Watts says his first FPGAs were simple Actel anti-fuse parts around 1990 or 1992, programmed by welding connections with a high voltage. Soundnews 16:39
2023-02-05Watts explains anti-fuse FPGAs needed a new chip for every change; from 1992 he used them for multiple dithered noise shapers summed in the analog domain. Soundnews 17:11
2023-02-05Watts says in 1995 anti-fuse FPGAs could run his noise shapers, when he created the pulse array and SPDIF receiver; in 1999, consulting for Chord, he adopted Xilinx FPGAs. Soundnews 18:09
2023-02-05Watts says that generation had enough processing power to do the interpolation filters as well. needs context Soundnews 18:49
2023-03-03Watts says a Hugo M Scaler in a Mojo-size case would run at 100 deg C, and fanless operation needs a fivefold FPGA improvement without rising cost. Head-Fi, Mar 2023
2023-03-28Watts says performance gains over ten years came partly from time and partly from FPGAs growing from about 20,000 gates to a million, opening new experiments. The Headphone Show 55:43
2023-04-11Watts says Moore's law has broken because cost per transistor now rises, citing 3nm mask costs of 500M to 1.5B USD against 0.3M USD for 150nm. Head-Fi, Apr 2023
2023-07-24Watts says the Choral range M scaler uses multiple Xilinx 200T FPGAs, since bigger FPGAs cost four times as much for a given performance. Head-Fi, Jul 2023
2023-10-01Watts says Mojo 2 launched about 18 months ago and that COVID brought huge parts problems, with FPGA prices soaring before coming down again. The Source AV 2:00
2023-10-01Watts says some FPGA prices rose by a factor of 10 and distributors pushed confirmed delivery dates back by a further year. The Source AV 3:23
2023-10-01Watts says Chord was treated unbelievably badly by suppliers and that it gets through a large number of FPGAs. The Source AV 3:55
2023-10-01Watts says Chord is the biggest user of Xilinx FPGAs through distribution in the whole of the UK. The Source AV 4:06
2023-10-01Watts explains that an FPGA can hold any digital circuit that fits, recounts his chip-consulting path (Verilog simulation, FPGA prototype, ASIC), and says FPGAs allow what chips cannot afford. The Source AV 4:47
2023-10-01Watts recalls a chip project at a company that had spent ten million US dollars developing it before presenting it to the board. The Source AV 5:36
2023-10-01Watts says the company would write off the 10 million unless the design could save five cents. needs context The Source AV 6:01
2023-10-01Watts says trimming the die cost nine months, mass-market chips are designed to minimum acceptable performance to cut cost, and with FPGAs he can do what he likes. The Source AV 6:15
2023-10-01Watts says FPGA cost for millions of gates does not matter in an expensive high-performance category; the passage ends saying it is not expensive for what you get. The Source AV 6:49
2023-12-06Watts says chip makers had no interest in a high-end DAC chip, and a WTA ASIC would need a 1M USD mask set in a 2M USD project. Head-Fi, Dec 2023
2024-01-07Watts says 16FS is the interpolation sweet spot (1.3uS vs 2.6uS timing at 8FS for 48kHz), adding more 200T FPGAs is the economic path, and a battery laptop via optical is hard to beat. Head-Fi, Jan 2024
2024-03-20Watts says listening tests must decide whether something is better, and that DAVE gave him a brand new FPGA with plenty of capacity. MFG Audio Reviews 44:51
2024-04-05Watts says well over 90% of DAC sound quality depends on interpolation filter and DAC implementation, criticizes listeners and reviewers, and says Quartet holds five 200T FPGAs. Head-Fi, Apr 2024
2024-05-16Watts says Quartet M Scaler took 6 years, his most complex project, with five FPGAs (the same as Hugo M Scaler), two million lines of code and 2,500 discrete components. ConvinceMeAudio 42
2024-05-17Watts says he spent six years on Quartet, his most complex project, which uses five FPGAs of the M Scaler's type instead of one and two million lines of code. AVstore 21
2024-05-17Watts says Quartet is as complex as a PC in a small box and has a separate 75 amp power supply to feed its FPGAs' power requirements. AVstore 1:13
2024-07-12Watts says FPGAs could run interpolation filters by 1999 and a million taps by 2015, leading to the Hugo M Scaler; his role was more taps and a better algorithm. HIFICLUB 11:31
2024-07-12Watts says the M Scaler's 1 million taps improved pitch, timbre and staging; Quartet uses more FPGA power for 4 million taps and an improved filter. HIFICLUB 14:45
2024-07-12Watts says the code is partly control code and partly filter coefficient values that must each be put into the FPGAs, adding up to over two million lines. needs context HIFICLUB 50:09
2024-07-18Watts says 1M taps gave 16-bit accuracy but any timing error is perceptible, describes the isolated 75 ohm coax output, and says flight-ready Quartet needs better FPGAs. Head-Fi, Jul 2024
2024-07-25Watts says it is two boxes, with a separate supply, because its five large FPGAs need 75 amps; it has 4 million taps, 4 times the Hugo M Scaler. Hifi Pig TV 1:28
2024-08-01Watts says he has designed silicon chips and sold his IP to semiconductor firms; an FPGA lets you do exactly what you want at low cost, while a custom chip costs millions and needs volume. Audiophilesdoteu 47
2024-08-01Watts says FPGA silicon costs more but gives freedom, and that chip DACs suffer digital noise through the substrate into the analog section, mitigated but never solved by differential structures. Audiophilesdoteu 1:31
2024-08-01Watts says differential chip DACs need complex analog stages, whereas in his designs the FPGA only makes data and discrete parts on a separate supply do conversion, avoiding digital noise. Audiophilesdoteu 2:13
2024-08-01Watts says better sound needs both the unique WTA algorithm, developed over many years with thousands of listening tests, and large FPGA computing capacity, summarizing his FPGA approach's benefits. Audiophilesdoteu 5:27
2024-09-29Watts says he prototypes, measures and tests to make sure everything is right, and works the same way with FPGAs even though FPGAs can be changed easily. The Source AV 12:10
2024-10-03Watts says PCB ground layers screen EMC, the new coefficient work needs a whole 200T FPGA and won't reach the Hugo M Scaler, and single-ended has the transparency edge. Head-Fi, Oct 2024
2025-02-17Watts says chip DACs cannot eliminate substrate noise; in an FPGA-based DAC the FPGA only creates digital signals and conversion is discrete, with flip-flops, resistors, separate supply and grounds. audio-2G 2:10
2025-02-17Watts says chip design is driven by price down to a few cents, while with FPGAs he can buy a bigger FPGA or use several to get processing power. audio-2G 2:58
2025-03-27Watts says Mojo 3 is news to him and a mobile M scaler awaits FPGAs: no low-cost successor to the 28nm 200T exists, and 16nm parts would dissipate about 8W. Head-Fi, Mar 2025
2025-05-12Watts says his Xilinx 200T FPGA has 720 DSP cores; the Quartet M Scaler he is developing to match DAVE has five 200T, two and a half thousand DSP cores. Audiophile Junkie 16:33
2026-03-17Watts says higher rates hit hardware limits: FPGA speed and processing, and discrete flip-flops that lose accuracy above 100 MHz, so about 100 MHz is the sweet spot. ecoustics 9:37
2026-03-17Watts says he thought 200 dB, versus 140 dB in chip DACs, was over-specified, but DAVE's larger FPGA finally gave him capacity to try better. ecoustics 35:41
2026-03-17Watts says the expensive scaler for DAVE has 'five two hundred T' FPGAs and a 75 amp supply that can create a lot of noise, which he had to keep from corrupting the DAC. ecoustics 1:10:13
2026-03-24Watts says he began with analog preamps and power amps, designed DACs from 1989 with Philips PDM chips that had severe problems, and by 1992 used FPGAs. Audio Force 7:36
2026-03-24Watts says the benefit of FPGAs is that today they allow extreme complexity. Audio Force 8:21
2026-03-24Watts says FPGAs allow thousands of times more complexity than a silicon chip, giving better sound quality, closer to the musical event and more emotionally engaging. Audio Force 8:29
2026-03-24Watts says Quartet has five 200T FPGAs, five times the Hugo M Scaler's chip count, with 75 amp peak currents, so the supply must block noise both in and out. Audio Force 24:08
2026-05-03Watts says discrete components with FPGAs outperform chips, allow digital complexity thousands of times greater, and free design choices such as 192 bits internal accuracy. Audio Force 2:28
2026-05-03Watts concludes that these are the benefits of FPGAs. needs context Audio Force 3:16
2026-05-03Watts says he would love to make a portable M Scaler, which needs better FPGAs. Audio Force 19:00
2026-05-03Watts says FPGAs have barely improved in 10 years; a portable M Scaler needs the processing power at very low dissipation, perhaps 10 or 20 years away. Audio Force 19:14
2026-10-02Watts says Franks, with an aerospace background, was intrigued by his FPGA-based discrete DAC technology, leading by 1999 to the DAC64, which had five FPGAs. HiFi Buys 16:16
2026-10-02Watts says in 2014 he had an FPGA about 10 times larger than before. HiFi Buys 25:39
2026-10-02Watts says on one chip program with $10 million invested, the board demanded five cents off the die cost, which took nine months of work. HiFi Buys 29:15
2026-10-02Watts says audio chips must sell at least 100,000 devices a year, so cost is severely limited and his designs would need far too much die area. HiFi Buys 30:07
2026-10-02Watts says discrete design separates digital and analog noise and allows billion-transistor FPGAs; FPGAs are slower and use more power than silicon but less than microprocessors. HiFi Buys 32:15
2026-10-02Watts says the disadvantage is man effort, citing 10 to 29 years' worth per device; chips measure very well, and he could build a DAC from scratch after 40 years. HiFi Buys 33:52
2026-10-02Watts says once a Verilog module is developed it goes into his library for reuse on other projects. HiFi Buys 34:37
2026-10-02Watts says a designer who knocks together an FPGA design in a year with marketing will almost certainly sound worse than a competent but limited chip design. HiFi Buys 34:45
2026-10-02Watts says newer FPGAs and tools are consistent, but he still keeps the same FPGA code and toggles between the two versions so everything else stays the same. HiFi Buys 1:19:04
2026-10-02Watts says NFM and small-signal accuracy are easy concepts but hard to implement; a proper FPGA design takes decades of man-years. HiFi Buys 2:28:40
2026-10-14Watts says 1999 Xilinx FPGAs could hold an interpolation filter and the DAC, so he launched DAC64 with a pulse array and a thousand-tap WTA filter. Part-Time Audiophile 46:08
2026-10-17Watts says he could fit only two in a 200T because the filter takes a whole FPGA, was a struggle, and its details are proprietary. article, Oct 2026
2026-10-17Watts says the FPGA gives needed precision and a direct FIR filter without FFT tricks, and the algorithm matters far more than tap count, as Blackbird and WTA show. article, Oct 2026