Jitter, clocks and the DPLL

Inputs, sources, cables and clocking

Answers on this topic

• Does source jitter matter with a Chord DAC, and would a reclocker, external clock or USB-to-SPDIF converter help?
• How does a pulse array DAC work, how does it differ from R2R and delta-sigma, and why is it insensitive to jitter?
• Which input sounds best on a Chord DAC (optical, coax, USB or BNC), and why does Rob prefer optical when it is said to have more jitter?

Everything he said on this topic (130)

One-line summaries in our words, oldest first. Each link opens the original.

• 2014-04-15Watts says Hugo's DAC is a pulse array with a 104 MHz noise shaper, the DPLL eliminates source jitter, and more taps keep helping, guessing 1M taps for 16-bit accuracy. Head-Fi, Apr 2014
• 2014-04-17Watts says Qute and Hugo use isochronous USB with timing from the DAC, so reported sound differences are not jitter but RF noise, sounding like reduced noise floor modulation. Head-Fi, Apr 2014
• 2014-05-13Watts says Hugo's USB chip takes timing from the FPGA, but the DPLL makes that minor; input differences come from RF noise causing noise floor modulation, so he prefers optical. Head-Fi, May 2014
• 2014-06-09Watts says USB affects sound via jitter and RF noise; Hugo solves jitter internally, add-on USB units add RF noise though isolation may help. Head-Fi, Jun 2014
• 2014-06-24Watts says Hugo's SD USB input loses no performance despite not being isochronous, because Hugo's jitter elimination works, and his isolator has arrived. Head-Fi, Jun 2014
• 2015-03-11Watts details Hugo's stages: 26,368-tap WTA from 1FS to 8FS, WTA stage two to 16FS with volume, interpolation to 2048FS, and noise shapers at 104.25 MHz tied to the DPLL. Head-Fi, Mar 2015
• 2015-03-27Watts says his USB input is isochronous asynchronous: asynchronous on the USB side but synchronous inside the FPGA, whose clock sets the timing. Audiophile Style, Mar 2015
• 2015-07-19Watts reports APx555 measurements showing identical dynamic range across Hugo's inputs, optical slightly worse THD despite sounding better, and no source jitter artifacts down to 500 fS. Head-Fi, Jul 2015
• 2015-10-02Watts says a femto clock sounded brighter due to low-frequency jitter, and DAC architecture, logic stages and pulse array's fixed-noise response matter more than headline clock jitter. Head-Fi, Oct 2015
• 2015-10-03Watts says pulse array's constant switching makes it immune to jitter, and USB purifiers are pointless for galvanically isolated Dave, Hugo TT and 2Qute; Hugo's issue is RF noise. Head-Fi, Oct 2015
• 2015-10-04Watts says avoid clocks with a PLL because of low-frequency jitter, a plain quartz oscillator sounds best, absolute frequency is unimportant, and external clocks add jitter. Head-Fi, Oct 2015
• 2016-01-02Watts presents an APx555 J-test of Dave's USB input at 48 kHz: no data-related jitter, a -170 dB floor implying under 0.1 pS, and 0.2 pS mains jitter probably from the analyzer. Head-Fi, Jan 2016
• 2016-01-21Watts says Dave's FPGA has 132 DSP slices plus 34 fabric cores, his DACs reject source jitter equally, and source differences come from RF and correlated noise, removed by isolation. Head-Fi, Jan 2016
• 2016-02-23Watts says optical will sound best and not to worry about source jitter because Dave eliminates it. Head-Fi, Feb 2016
• 2016-02-24Watts says his DACs' DPLL removes incoming jitter, so optical's benefit is galvanic isolation reducing noise floor modulation, while USB is also isolated and already clocked by the DAC. Head-Fi, Feb 2016
• 2016-03-22Watts agrees USB is a tad more detailed than optical, with optical showing barely measurable jitter degradation, because USB timing comes from the FPGA; both are galvanically isolated. Head-Fi, Mar 2016
• 2016-05-13Watts gives four reasons jitter is a non-issue on DAVE, including the pulse array's jitter insensitivity, and says reducing RF noise sounds warmer and softer and is more transparent. Head-Fi, May 2016
• 2016-06-18Watts recounts moving from word clocks and the DAC64's buffer to a DPLL perfected over six or seven years, and says word clocks would now be a backward step. Head-Fi, Jun 2016
• 2016-06-29Watts says DAVE's USB is timed by its own clock, while other inputs use his DPLL, actually frequency-locked with a tiny buffer, so source jitter cannot reach the output. Head-Fi, Jun 2016
• 2016-08-19Watts separates input jitter, removed by the DPLL and local clock, from transient reconstruction timing, where a conventional filter can misplace a zero crossing by thousands of nanoseconds. Head-Fi, Aug 2016
• 2016-09-04Watts recalls using multiple dithered noise shapers for DSD256 in the early 1990s, explains that his 1995 pulse array eliminates correlated jitter, and why discrete flip-flops beat on-chip shift registers. Head-Fi, Sep 2016
• 2016-09-07Watts says DAVE is very slightly microphonic, suggests vibration may add low-frequency jitter skirts that sound hard, and says femto clocks add skirts and brightness mistaken for transparency. Head-Fi, Sep 2016
• 2016-09-25Watts explains why DAVE uses his DPLL rather than the DAC64/QBD76 buffer, word clocks or an external master clock: PLLs add low-frequency jitter, causing FFT fringing and brightness. Head-Fi, Sep 2016
• 2016-09-26Watts points to DAVE's J-test, where skirting at -160 dB spans about +/- 20 Hz, about 1 pS of 20 Hz jitter, dominated by the APx555; worse skirting sounds brighter. Head-Fi, Sep 2016
• 2017-03-28Watts uses standard plastic optical cables, very short at 192 kHz, saying his DACs are intolerant of jitter and of optical's asymmetric rise and fall times, which the FPGA receiver calibrates for. Head-Fi, Mar 2017
• 2017-04-09Watts says USB timing comes from the DAC, optical and USB sounded the same on headphones, and all jitter is eliminated from a measurement point of view. Head-Fi, Apr 2017
• 2017-05-17Watts says re-timing has no benefit for any source, but RF levels can matter; the Remedy would sound worse or no different in his system, so spend on music instead. Head-Fi, May 2017
• 2017-05-25Watts explains why pulse array DACs are jitter immune, why femto clocks with PLLs degrade sound, and how a Hugo 2 prototype jitter and element-mismatch test exposed a layout fault. Head-Fi, May 2017
• 2017-06-13Watts says Hugo 2 re-clocks via its DPLL locked to the master clock, eliminating source jitter, shown by USB sounding the same as optical, so re-clockers are pointless. Head-Fi, Jun 2017
• 2017-12-02Watts calls the reference voltage the key internal supply, explains 2Qute's upgraded regulation and RF filtering, his jitter-removing DPLL, and pulse array jitter tolerance (DAVE 128 to 128.5 dB). Head-Fi, Dec 2017
• 2017-12-05Watts introduces clock jitter as the next subject. RMAF 24:42
• 2017-12-05Watts calls claims for femtosecond external clocks nonsense because clock jitter is regenerated inside a chip's clock tree, starting with the input buffer. RMAF 24:46
• 2017-12-05Watts says in chips he designed, 1 picosecond input jitter became 4 picoseconds at the active elements despite triple well isolation, so a 75 femtosecond clock is irrelevant. RMAF 25:30
• 2017-12-05Watts says R2R DAC FETs take about a microsecond to switch and vary by about 10%, giving 100 nanoseconds of timing uncertainty that dwarfs 75 femtoseconds. RMAF 26:17
• 2017-12-05Watts says jitter affects DAC architectures differently: R2R and DSD switching activity depends on the signal, R2R switching all FETs near zero and DSD switching most at zero. RMAF 26:53
• 2017-12-05Watts says PWM and pulse array have signal-independent switching, so jitter and glitch errors become DC, avoiding anharmonic distortion and noise floor modulation. RMAF 27:38
• 2017-12-05Watts recounts a project specified at 120 dB with 4 picoseconds of jitter, later changed to 15 picoseconds, which he met by changing the number of elements. RMAF 28:20
• 2017-12-05Watts says within a month he had a design giving 120 dB with 15 picoseconds of jitter, though he was annoyed the requirement was not stated at the start. RMAF 29:04
• 2017-12-05Watts concludes that what matters is the jitter measured at the DAC's output, not the clock's jitter level, then introduces chip DACs. RMAF 29:18
• 2017-12-05Watts says pulse array needs no resistor matching; a DC test shows resistor tolerance and clock jitter degrade the 126 dB noise figure by only half a dB. RMAF 42:18
• 2017-12-05Watts says Hugo 2 goes from 126 to 126.5 dB and DAVE from 128.5 to 129 dB; Chord uses femto clocks without fuss, and better clocks are not worth it. RMAF 43:11
• 2017-12-05Watts shows a jitter test with no visible jitter, says Mojo nearly matches DAVE, and credits DAVE's low 19/20 kHz two-tone distortion to its second-order analog noise shaper amplifier. RMAF 50:44
• 2017-12-09Watts says a buffer's output clock must be frequency or phase locked to the input, so the system Ted describes is effectively his DPLL; implementation is where sound quality differs. Head-Fi, Dec 2017
• 2017-12-09Watts says his DPLL only tracks long-term frequency when locked, so source jitter has no bearing; it took six years of listening comparisons to perfect. Head-Fi, Dec 2017
• 2018-01-08Watts says he heard no USB vs optical difference on Hugo 2 with a laptop and headphones, so his DPLL is sonically perfect, and the warmer source is better. Head-Fi, Jan 2018
• 2018-01-11Watts calls external clocks a disaster: the local PLL adds low-frequency jitter whose skirts sound like noise floor modulation, heard as brightness mistaken for transparency. Head-Fi, Jan 2018
• 2018-01-11Watts now attributes USB's slight brightness on DAVE to RF through ground loops and the isolators' 2 pF, not timing, since Hugo 2 USB sounds like optical. Head-Fi, Jan 2018
• 2018-01-13Watts says conventional SPDIF receivers with analog PLLs create signal-correlated jitter, while his digital receiver and DPLL remove it and source jitter, so I2S or HDMI offers no benefit. Head-Fi, Jan 2018
• 2018-03-28Watts says his DPLL keeps buffer latency equal across asynchronous units, with maximum 5 uS drift and about 1 uS typical, and all current DACs share the DPLL code. Head-Fi, Mar 2018
• 2018-04-08Watts says the DPLL minimizes buffer delay while eliminating source jitter, so Hugo 2 and Qutest fed from one SPDIF source show no noticeable delay difference. Head-Fi, Apr 2018
• 2018-04-20Watts says USB is best, AES/EBU is a joke standard, and external clocks either worsen sound or do nothing because DAVE's crucial clock sits beside the pulse array. Head-Fi, Apr 2018
• 2018-05-15Watts says his DPLL creates a new word clock frequency locked to the source on the 104.25 MHz master clock, took 6 years, and made Hugo 2 USB match optical. Head-Fi, May 2018
• 2018-05-15Watts says the DPLL is frequency locked, not phase locked, ignoring jitter; adding 2 uS of source jitter, over a thousand times typical, changes no measurements. Head-Fi, May 2018
• 2018-05-17Watts says with asynchronous USB the source clock is irrelevant: clocking comes only from the FPGA, and data crossing the galvanic isolation is clocked from the FPGA clock. Head-Fi, May 2018
• 2018-05-18Watts says the DPLL's buffered regenerated clock eliminates source jitter (Hugo 2 USB/optical tests showed no change), and explains why signal-related noise sounds brighter, audible even at -200 dB. Head-Fi, May 2018
• 2018-06-09Watts explains his fast-locking PLL-free SPDIF decoder, a DPLL with adaptive time constants re-locking to a local 104.25 MHz clock, and volume ramping that makes source switching seamless. Head-Fi, Jun 2018
• 2018-06-11Watts says his all-digital SPDIF receiver decodes jitter up to 25% of a bit interval, adapts to optical rise and fall times, and will be reused in all new designs. Head-Fi, Jun 2018
• 2018-07-26Watts says the M scaler needs bit-perfect input because PC upsamplers lack the processing power and a sinc-like WTA algorithm; its SPDIF output is asynchronous but the DPLL is transparent. Head-Fi, Jul 2018
• 2018-07-29Watts says sound quality can only be impaired by RF noise through the ground, which optical avoids, and source jitter is not an issue with his DACs. Head-Fi, Jul 2018
• 2018-08-04Watts says the issue is non-linear transient timing, the master clock and source jitter are unimportant thanks to the DPLL, and Hugo 2 gets full 1M taps via 3.5mm-to-BNC adaptors. Head-Fi, Aug 2018
• 2018-10-01Watts says a DPLL removes optical input jitter, output uses a low-jitter analog PLL, the M scaler auto powers down, and Blu 2 standby affects only the CD mech. Head-Fi, Oct 2018
• 2018-10-14Watts says Hugo 2 has USB RF filtering and measured no effect from 2uS input jitter, heard no USB vs optical difference, and advises avoiding source gadgets that add RF. Head-Fi, Oct 2018
• 2018-11-13Watts says USB is decoded and buffered by an Atmel ARM device with custom code, clocked from the FPGA's 104MHz master clock; the FPGA handles everything else. Head-Fi, Nov 2018
• 2018-12-12Watts says canceling clock edges eliminates master-clock jitter effects, and explains the reference supply: a DAC modulates a reference voltage, so its noise or variation directly affects performance. Pursuit Perfect System 33:24
• 2018-12-12Watts says every circuit point has RF decoupling, with quad-layer ground planes, a digital PLL eliminates source jitter, and TT2's noise floor is minus 178 dB with zero measurable NFM. Pursuit Perfect System 34:53
• 2018-12-12Watts says it works with the M Scaler, calls the measurements state of the art (only DAVE beats them), and gives the jitter-test floor as minus 170 dB, not 178. Pursuit Perfect System 40:30
• 2018-12-12Watts says the jitter test shows no jitter components, removing source and internal jitter, and that he signs off no design until it shows no measurable noise floor modulation. Pursuit Perfect System 41:18
• 2019-02-06Watts says a PLL would add low-frequency jitter seen as skirts around fundamentals, explains timing closure, and says the M scaler mode processes already-recorded files. needs context Head-Fi, Feb 2019
• 2019-02-09Watts says a cyan input light shows M Scaler dual data and 1M taps; optical matching USB proves his DPLL removes source jitter, and simpler, lower-power sources sound better. Head-Fi, Feb 2019
• 2019-04-08Watts says Toslink is the reference input since it injects no RF into the ground plane, his DPLL removes source jitter, and he heard no consistent USB-optical difference. Head-Fi, Apr 2019
• 2019-04-30Watts says he has never seen packet noise contamination, measuring Hugo 2 down to -180dB, and it would not show zero measured jitter if it were sensitive to it. Head-Fi, Apr 2019
• 2019-05-15Watts says Mojo is not jitter sensitive; apparent sensitivity depends on test equipment, and an APx555 shows no jitter errors. Head-Fi, May 2019
• 2019-05-28Watts says 2 uS of 1 kHz jitter on SPDIF measures nothing down to -180 dB, and rejects a salesman label, calling himself a measurement and controlled-listening designer. Head-Fi, May 2019
• 2019-07-17Watts says he has not tried to replicate a reported issue and finds it odd, since the USB word clock passes through the same DPLL modules as the SPDIF inputs. needs context Head-Fi, Jul 2019
• 2019-07-25Watts says his DPLL uses only frequency once locked, so even 2 uS of source jitter has no effect, and external flip-flops remove FPGA jitter, verified with switching stopped. Head-Fi, Jul 2019
• 2019-09-23Watts explains he avoids native DSD conversion for jitter sensitivity and noise, and that DoP (to DSD256) and native ASIO transmission (to DSD512) deliver identical data. Head-Fi, Sep 2019
• 2019-11-17Watts says the number is an integer multiple of 44.1 and 48 kHz to ease USB clock synthesis, and state-of-the-art ADCs suffer aliasing, poor small-signal accuracy and noise floor modulation. needs context Head-Fi, Nov 2019
• 2019-12-16Watts says each DSD DAC sounded and measured different and needed tweaking, and that DSD DACs are very sensitive to clock jitter and parasitics because switching activity varies with signal. Passion for Sound 2:28
• 2019-12-16Watts explains that DSD switching activity falls as signal rises, making jitter and glitches signal dependent and causing distortion, and that DSD and R2R DACs are both highly jitter sensitive. Passion for Sound 3:12
• 2019-12-16Watts says this gives clock cancellation, so clock jitter has no effect. needs context Passion for Sound 4:44
• 2020-01-01Watts says the DACs use a third overtone crystal by the flip-flops and no PLLs, so measurements need no warm-up, though Hugo 2 seemed slightly different after ten minutes. Head-Fi, Jan 2020
• 2020-06-02Watts replies 'you mean degraded' by adding an external clock, correcting a poster's claim. needs context Head-Fi, Jun 2020
• 2020-08-03Watts says M scaler clocks are a red herring: the DAC's 104.25 MHz clock and DPLL re-time the data, so 2 uS of input jitter causes no measurable error. Head-Fi, Aug 2020
• 2020-09-08Watts says analog PLL capacitors in older DACs settle over hours and cause correlated jitter, while his DPLL designs measure identically over time and reach optimum sound within 10 minutes. Head-Fi, Sep 2020
• 2021-01-29Watts says his ADC uses a pulse array DAC in its feedback loop at 104 MHz, and converting to 768k synced to studio clocks needs a complex fractional interpolation filter. Head-Fi, Jan 2021
• 2021-03-10Watts says a poster's 'birdie tweets' are false and that external clocks for DACs are a crazy idea. needs context Head-Fi, Mar 2021
• 2021-03-11Watts says feeding the clock back once solved interface jitter but is unnecessary with his DPLL, which he developed mainly for video sources that cannot accept a returned clock. Head-Fi, Mar 2021
• 2022-02-22Watts says there is no advantage, because the DPLL on SPDIF inputs creates a jitter-free word clock from the master clock, frequency locked to the incoming data. needs context Head-Fi, Feb 2022
• 2022-03-02Watts says he replaced analog PLLs with a DPLL that took six years and sounds identical to a 4-second RAM buffer, so source asynchrony does not matter, only RF noise. Head-Fi, Mar 2022
• 2022-03-28Watts says there are no PLLs in Chord DACs, only one fixed very low jitter clock that drives the entire digital audio path. Head-Fi, Mar 2022
• 2022-03-28Watts details SPDIF word clock extraction and his frequency-locked DPLL on a 104.25MHz clock, and says USB can match optical but RF leaks through the 2pF isolation. Head-Fi, Mar 2022
• 2022-07-06Watts says the Hugo M Scaler's extra noise at 2x and 4x is deliberate Gaussian dither that sounds better, 16x noise is unchanged, and Chord DACs remove its jitter. Head-Fi, Jul 2022
• 2022-08-19Watts says Chord DACs' digital phase lock loop eliminates source jitter; in a test with 2 microseconds of jitter at 1 kHz he saw a noise floor of, he thinks, -170 dB and no sidebands. AVstore 38:19
• 2022-08-19Watts says the extra jitter generated by the scaler is not a problem at all for Chord DACs. AVstore 39:08
• 2022-08-19Watts says to use optical as the reference since it is perfectly galvanically isolated, and its slightly higher jitter than BNC does not matter with Chord DACs. AVstore 42:56
• 2022-08-19Watts says you can use it without worrying about jitter. needs context AVstore 43:50
• 2022-08-23Watts says external clocks increase jitter at conversion, any 'improvement' is brighter noise floor modulation from PLLs, and they are a marketing device to sell another box. Head-Fi, Aug 2022
• 2023-02-05Watts says processing the clock is the problem: his SPDIF receiver converts to I2S inside the FPGA, so the clock question remains either way. Soundnews 45:20
• 2023-02-05Watts says the issue is converting an asynchronous clock to a synchronous one, not the number of lines; jitter arrives the same via a direct clock input or SPDIF decoder. Soundnews 46:01
• 2023-02-05Watts says his digital phase lock loop strips out input jitter and noise, took about six years to perfect, and earlier DACs used a four-second buffer instead. Soundnews 46:33
• 2023-02-05Watts says data at roughly 44.1 kHz went into the buffer and was clocked out with the local synchronous clock. needs context Soundnews 47:14
• 2023-02-05Watts says after six years his digital PLL matched the buffer's ideal behavior; injecting 2 microseconds of 1 kHz jitter produces no output sidebands, measured down to -160 dB. Soundnews 47:29
• 2023-02-05Watts says 2 microseconds is a thousand times real-world jitter, so better clocks are unneeded; an I2S 64FS bit clock cannot serve his 2048FS master clock anyway. Soundnews 48:12
• 2023-02-05Watts says they lack the benefits of his digital phase lock loop. needs context Soundnews 50:42
• 2023-02-05Watts says analog phase lock loops were a nightmare: every DAC measured and sounded different, they stayed jitter-sensitive and added low-frequency jitter, a noise floor modulation problem that sounds harder. Soundnews 50:47
• 2023-02-05Watts says analog phase lock loops are a huge problem best resolved by eliminating them, which requires a more complex solution. Soundnews 51:35
• 2023-03-26Watts says M Scaler output jitter is irrelevant because his DACs eliminate it; it was never designed for low jitter, and 2 microseconds of jitter has no measured impact. Eric's Hi-Fi 24:19
• 2023-03-26Watts says M Scaler jitter is nanoseconds, so that criticism is irrelevant; DAVE measured extraordinarily for him and HiFi News, recalled as 0.0000 four or five zero seven percent distortion. Eric's Hi-Fi 25:05
• 2023-03-28Watts says he has designed about 50 DACs, worked with Chord just over 25 years while independent and owning his IP, and that femtosecond-clock claims are meaningless across DAC architectures. The Headphone Show 2:22
• 2023-03-28Watts says quoted cycle-to-cycle jitter tells half the story; low-frequency jitter changes sound, and he cites a chip project specified at 4 picoseconds and 120 dB. The Headphone Show 3:16
• 2023-03-28Watts says when the client changed the spec to 15 picoseconds he redesigned the DAC and still got 120 dB, so jitter sensitivity depends on the DAC design. The Headphone Show 4:01
• 2023-03-28Watts says every logic stage inside a chip adds about a picosecond of jitter, and switching devices that switch in microseconds matter more than the master clock's jitter. The Headphone Show 4:45
• 2023-03-28Watts calls external clocks a crazy idea borrowed from pro studios' word clocks, since the clock passes through output buffers, a cable and input buffers into the DAC. The Headphone Show 5:29
• 2023-03-28Watts says external clocks need a PLL that improves cycle-to-cycle jitter but degrades low-frequency jitter, a form of noise floor modulation that sounds brighter and so more impressive. The Headphone Show 6:12
• 2023-03-28Watts says more bits improve resolution and reduce jitter sensitivity; his answer to the 4 to 15 picosecond jitter spec was to add more DAC elements. The Headphone Show 24:55
• 2023-03-30Watts explains SPDIF locking and the lock flag, which Mojo 2 uses to switch data sources and disable auto shutdown, regardless of whether the data is silent. Head-Fi, Mar 2023
• 2023-09-29Watts says 7W from TT2 should not damage speakers unless clipping, and a stereo ADC in design will offer SRC-based external word clock sync and possibly Dante. Head-Fi, Sep 2023
• 2024-02-06Watts says optical makes no difference or sounds warmer with better depth than USB, since source jitter does not matter but RF ground currents can, making Toslink the reference. Head-Fi, Feb 2024
• 2024-02-15Watts says NFM sounds etched and brighter but degrades focus, the DPLL handles source PSU noise via optical, and battery plus optical on the M Scaler removes the ground loop. Head-Fi, Feb 2024
• 2024-03-20Watts names three ways a source can change a DAC's sound (jitter, random RF noise causing noise floor modulation, correlated RF noise) and defines jitter as clock-timing uncertainty. MFG Audio Reviews 2:33
• 2024-03-20Watts says an analog phase-lock loop itself creates jitter and never removes source jitter, cables add jitter, each logic gate adds about one picosecond, and sources differ in jitter. MFG Audio Reviews 3:30
• 2024-03-20Watts says jitter is no issue with his DACs because a digital phase-lock loop builds a new clock from a local master clock, so the source clock is unused. MFG Audio Reviews 4:18
• 2024-03-20Watts says optical blocks correlated and random RF noise; it often has worse jitter, though his Audio Precision ATS2 measured less on optical than BNC, and his DPLL removes this. MFG Audio Reviews 23:47
• 2024-04-17Watts says pre-production Quartet into Dave beat an M scaled Dave, it works with all current DACs, and a dedicated bit clock would only add RF. Head-Fi, Apr 2024
• 2024-06-10Watts says the DPLL fixed low-frequency master clock jitter (DAC64 used a buffer), while cycle-to-cycle jitter is made unmeasurable by enough pulse array elements. Head-Fi, Jun 2024
• 2024-07-12Watts says DSD sounds unnaturally warm and soft from poor transients, and its full-scale 1-bit swing makes it very sensitive to clock jitter. HIFICLUB 39:15
• 2024-11-22Watts corrects himself: USB sounded brighter on 2Qute from noise floor modulation, not better clocking, as a later test found USB and optical identical; listening tests easily mislead. Head-Fi, Nov 2024
• 2025-03-19Watts says the FPGA-to-flip-flop path delay is irrelevant without setup and hold violations, because the pulse array flip-flop outputs are retimed by the 104MHz master clock. Head-Fi, Mar 2025
• 2026-03-17Watts says RF noise reaching the analog parts is the main reason digital cables change the sound, at least in his DACs, which are completely jitter tolerant. ecoustics 1:03:17
• 2026-10-02Watts says an array of PWM schemes, rising edges canceling falling edges, made switching signal-independent, cut jitter sensitivity and let the noise shaper run at 104 MHz. HiFi Buys 1:43:13